{"meta":{"count":5,"page":1,"pages":1,"per_page":12,"applied":{"engine":null,"model":null,"quant":null,"storage":null,"hardware":["dgx-spark-x4","170hx-x3"],"generation":null,"task":null,"tier":null,"tags":[],"vram":null,"search":null,"sort":"updated","featured":false},"origin":"https://localairecipes.com","openapi":"/openapi.json","updated_at":"2026-10-31T18:05:44+00:00"},"recipes":[{"slug":"glm-5-3-flash-exlr8-exl3-experts-on-dgx-spark-tp1-4","title":"GLM-5.3-Flash exlr8 EXL3 experts on DGX Spark TP1-4","summary":"GLM-5.3-Flash exlr8: MoE layers are EXL3-trellis units decoded by the custom exlr8 MoE kernel; dense linears stay FP8/NVFP4. One release carries three expert widths (k2/k3/k4 = 2/3/4 bpw), chosen at boot via VLLM_EXLR8_WIDTHS. Reference topology TP=4 on four GB10 boxes; TP=1 serves the whole model (~87 GiB) on one 128 GB DGX Spark / ASUS GX10 via tp1.yaml plus a distinct MENTAT_GROUP. TP=2 and TP=3 also measured. 2026-10-19, clocks TP-locked at 2200 MHz: decode code 128.0 tok/s, prose 72.5 at TP=4; 53.0 / 29.5 at TP=1; prefill 4,393 tok/s at 8K, 4,190 at 32K. Trade vs the shipping NVFP4 build: decode +3-8%, NLL equal or better, KV pool ~+15%, prefill 7.7% lower at Second 1x-Spark GLM-5.3-Flash lane: not the VQ Q4_K GGUF lane (/r/glm-5-3-flash-vq-q4-k-1x-dgx-spark-1m-ctx-jlfn), and not a fork of the 2x ATLAS build (/r/glm-5-3-flash-nvfp4-on-2x-dgx-spark-atlas-rc4-2-tp2-dflash2-1m) whose NVFP4 Flash base this stack overlays.","tier":"community","beta":false,"generation":"blackwell","decode_tok_s":65.2000000000000028421709430404007434844970703125,"prefill_tok_s":3438.5,"updated_at":"2026-10-31 11:51:31.886893-06","commit_sha":"e576a851c441c37ac2fb42dfa0188eef41f910e0","content_hash":"237f8f6570a37cb5ddb895edbae6d611ef23660e","votes":0,"credit":[{"name":"kindlingai","url":"https://github.com/kindlingai/glm-5.3-flash-exlr8-gx10"},{"name":"nvidia","url":"https://huggingface.co/nvidia/GLM-5.3-Flash-NVFP4"}],"uploaded_by":"localai-recipes","measured":null,"links":{"self":"/api/v1/recipes/glm-5-3-flash-exlr8-exl3-experts-on-dgx-spark-tp1-4.json","alternate":"/r/glm-5-3-flash-exlr8-exl3-experts-on-dgx-spark-tp1-4"}},{"slug":"ds4-flash-3x170hx-pp3-dspark-k5","title":"DeepSeek V4 Flash-0731 abliterated on 3x CMP 170HX \u2014 vLLM patched PP3 DSpark K5","summary":"The proven 3-card pipeline-parallel recipe on CMP 170HX (sm_80, 64GB unlocked): PP=3 with manual layer partition 15,16,12 at util 0.98, FP8 KV, block-size 256, DSpark block drafting at exactly 5 speculative tokens, async scheduling, CPU pinning (dedicated physical cores, placeholder in launch args), hard memory cap 64g with swap disallowed. Structured decode 181 tok/s at 99% acceptance. Upstream reference repo: allover326/deepseek-v4-cmp170hx @ 3dd2d88 (Aug 13 2026) \u2014 documents 15,15,13 3-card split, retracted 4-card requirement, INT4 524288 ctx w/ DSV4_LOGITS_ROW_CHUNK=64, +7% decode via c3046d1 rebase patches (full source build required). First-party 15,16,12 numbers on this page are ours.","tier":"curated","beta":false,"generation":"ampere","decode_tok_s":129.900000000000005684341886080801486968994140625,"prefill_tok_s":2350,"updated_at":"2026-10-29 21:32:23.860633-06","commit_sha":"24a9ac90156459e4efb49c951590edbea775df38","content_hash":"02d56ece2249f2b3e2b1ee2ffce158e841e20d26","votes":0,"credit":[{"name":"allover326","url":"https://github.com/allover326/deepseek-v4-cmp170hx"}],"uploaded_by":"localai-recipes","measured":null,"links":{"self":"/api/v1/recipes/ds4-flash-3x170hx-pp3-dspark-k5.json","alternate":"/r/ds4-flash-3x170hx-pp3-dspark-k5"}},{"slug":"deepseek-v4-1-flash-on-4x-dgx-spark-tuned-tp4-sglang-dspark","title":"DeepSeek-V4.1-Flash on 4x DGX Spark \u2014 tuned TP4 SGLang/DSpark","summary":"","tier":"community","beta":false,"generation":"blackwell","decode_tok_s":89.7000000000000028421709430404007434844970703125,"prefill_tok_s":5650,"updated_at":"2026-10-29 21:32:23.622356-06","commit_sha":"ddf188add74be5de70f13f6f71735ec18a87c83c","content_hash":"647b167cbdd40dfd95cbaabc81e8624e929d847d","votes":0,"credit":[{"name":"knapcio (TP4 profile, v2.1-v2.3 production stack, release gates)","url":"https://github.com/knapcio/DeepSeek-V4.1-Flash-4x-DGX-Spark-TP4"},{"name":"MiaAI-Lab (upstream: launcher, Engram store, b12x routing, memory model)","url":"https://github.com/MiaAI-Lab/DeepSeek-v4.1-Flash-DGX-Sparks"},{"name":"0xSero (original 4x RTX PRO 6000 recipe skeleton boot.py derives from)","url":"https://github.com/sybil-solutions/deepseek-v4.1-flash-4x-rtx-pro-6000"},{"name":"kpham-sgl (sglang#39187 bounded dense-indexer prefill transient, backported as adapter/indexer_chunked*.py)","url":"https://github.com/sgl-project/sglang/pull/39187"},{"name":"BBuf + dsv4.1 branch contributors (#39370, #39646, #39648, #39653 decode kernel work in the canary images)","url":"https://github.com/sgl-project/sglang"},{"name":"rhys101 (SG17 RoCEnante overlay + SG18 prefill TP split from DeepSeek-V4.1-Flash-vLLM-DGX-Spark-8)","url":"https://github.com/rhys101/DeepSeek-V4.1-Flash-vLLM-DGX-Spark-8"},{"name":"local-inference-lab \u2014 Luke Alonso & Jason (b12x: RoCEnante one-shot RDMA all-reduce + fused MoE kernels)","url":"https://github.com/local-inference-lab/b12x"},{"name":"FujitsuPolycom + sparkring contributors (switchless-ring opposite-node paths, path-aware RoCEnante)","url":"https://github.com/FujitsuPolycom/sparkring"},{"name":"Saolence (#1/#2/#4/#5/#6: ring as opt-in switch, NCCL/build fixes, first-deployer review)","url":"https://github.com/knapcio/DeepSeek-V4.1-Flash-4x-DGX-Spark-TP4/pull/4"},{"name":"rsync/rchmagos (#8: RoCEnante on the switchless ring, DSV41_ROCE_RING + scripts/ring_mesh/)","url":"https://github.com/knapcio/DeepSeek-V4.1-Flash-4x-DGX-Spark-TP4/pull/8"}],"uploaded_by":"localai-recipes","measured":null,"links":{"self":"/api/v1/recipes/deepseek-v4-1-flash-on-4x-dgx-spark-tuned-tp4-sglang-dspark.json","alternate":"/r/deepseek-v4-1-flash-on-4x-dgx-spark-tuned-tp4-sglang-dspark"}},{"slug":"glm-5-3-flash-nvfp4-4x-dgx-spark-switchless-ring-tp4-dflash2","title":"GLM-5.3-Flash NVFP4 4x DGX Spark switchless ring TP4 DFlash2","summary":"Recipe by Alex Ellis / OpenFaaS Ltd. GLM-5.3-Flash (320B-A18B, NVFP4) served tensor-parallel 4 across four DGX Spark (GB10, sm_121) nodes cabled as a closed switchless RoCE ring: two rails per node wired to two neighbours, the non-adjacent hop relayed through a neighbour \u2014 no switch on the data path or the procurement path. Collectives use canonical switchless-nccl v0.0.1 (NCCL 2.30.7 + two Apache-2.0 switchless patches + OpenFaaS hardening patch), LD_PRELOADed with pinned library sha256 and NCCL_ALGO=Ring; not SparkRing/SIRCL, distinct from the site's switched 4x Spark SGLang lane. vLLM on the public tonyd2wild sm121-v11-dflash2 image: TP4, marlin MoE, FP8 E4M3 KV at 12 GiB per rank (pool 1,576,246 tokens = 6.01x window), DFlash2 drafter k=7, glm47 tool + glm45 reasoning parsers, max-num-seqs 6, workers (ranks 3,2,1) headless first, then head rank 0 opens the single OpenAI-compatible endpoint on :8000. Same fabric also served GLM-5.2 (EXL3, QuantTrio) and DeepSeek-V4-Flash at TP4.","tier":"community","beta":false,"generation":"blackwell","decode_tok_s":45,"prefill_tok_s":1971.59999999999990905052982270717620849609375,"updated_at":"2026-10-20 21:52:36.421715-06","commit_sha":"3ec203d32cde9b249d3e88f040a8d0c79650c3db","content_hash":"9cf1d9bb8001b5e721793f15e201aee0b5916f6d","votes":0,"credit":[{"name":"Alex Ellis / OpenFaaS Ltd","url":"https://github.com/alexellis/glm-5.3-flash-4x-dgx-spark-switchless"}],"uploaded_by":"localai-recipes","measured":null,"links":{"self":"/api/v1/recipes/glm-5-3-flash-nvfp4-4x-dgx-spark-switchless-ring-tp4-dflash2.json","alternate":"/r/glm-5-3-flash-nvfp4-4x-dgx-spark-switchless-ring-tp4-dflash2"}},{"slug":"qwen3-8-flash-next-w4a16-3x-cmp-170hx-pp3-nvme-ple-fp8-kv-1m-cle","title":"Qwen3.8-Flash-Next W4A16 3x CMP 170HX PP3 NVMe PLE fp8 KV 1M (clee)","summary":"Working PP3 recipe for Qwen3.8-Flash-Next (Qwen4Exp 180B-A6B MoE, Intel INT4 W4A16 AutoRound) on 3x CMP 170HX (SM80, unlocked 64 GiB each): the 95.4 GiB BF16 PLE n-gram table streams live from NVMe (shard-direct preadv into a fixed GPU staging buffer, never fully loaded), fp8 e4m3 KV software-decoded on SM80, mamba SSM cache bf16, and 1,048,576-token context via YaRN x4 over the 262144-native checkpoint. KV pool 5.97M tokens (~5.7 concurrent 1M sessions). W4A16 experts run GPTQ-Marlin bit-exact; no GPU P2P on this card pairing, so PP stages through host RAM with NCCL_P2P_DISABLE=1 + --disable-custom-all-reduce. Measured cold-cache temp=0: prefill 2389 tok/s @4k rising to 4690 @1M (QSA sparse crossover past ~64k), decode 73.2 -> 59.8 tok/s @1M, TTFT 223 s @1M; exact needle recall at all depths through 1M. Fork clee/vllm-sm80 on a PINNED nightly; newer nightlies not validated.","tier":"community","beta":false,"generation":"ampere","decode_tok_s":73.2000000000000028421709430404007434844970703125,"prefill_tok_s":3563,"updated_at":"2026-10-20 15:34:25.555323-06","commit_sha":"fb3da33b3299da70eb24ce68a2c772de0dc1a356","content_hash":"0dea5f8b482a14a47e6cef76e85ad322d56f9821","votes":1,"credit":[{"name":"clee (recipe, fork patches, bench + needle harness)","url":"https://github.com/clee/qwen3.8-flash-next-3x170hx"},{"name":"clee (vllm-sm80 fork: units-fix, fp8-kv-sm80, ple-pp3, ple-nvme-staged)","url":"https://github.com/clee/vllm-sm80"},{"name":"Kai / 2Wild (Qwen38-Flash-Next-4x3090 \u2014 staged-PLE architecture inspiration)","url":"https://github.com/tonyd2wild/Qwen38-Flash-Next-4x3090"},{"name":"Intel (INT4 W4A16 AutoRound quant)","url":"https://huggingface.co/Intel/Qwen3.8-Flash-Next-W4A16-AutoRound"},{"name":"froggeric (bugfixed Qwen3.8 chat templates)","url":"https://huggingface.co/froggeric/Qwen-Fixed-Chat-Templates"}],"uploaded_by":"localai-recipes","measured":null,"links":{"self":"/api/v1/recipes/qwen3-8-flash-next-w4a16-3x-cmp-170hx-pp3-nvme-ple-fp8-kv-1m-cle.json","alternate":"/r/qwen3-8-flash-next-w4a16-3x-cmp-170hx-pp3-nvme-ple-fp8-kv-1m-cle"}}]}